Hardware IPs (RTL)
Allegro offers several H.264/MPEG-4 AVC hardware (RTL) real-time encoding IPs. These IPs use Allegro’s H.264 compression algorithms originally designed for high-quality broadcast applications.
Allegro’s H.264 encoding technology has already been used successfully in a 65nm System-On-Chip (SOC) by one of the world's top5 IC vendors.
Allegro’s H.264 encoding technology is perfectly suited for integration in applications like:
Mobile phones
Camcorders
Set-top boxes
Webcams
Video surveillance
All Allegro’s encoding IPs have been tested using Allegro’s “industry standard” certification streams.
Allegro’s H.264 encoding IPs are available for H.264 baseline, main and high profiles in resolutions ranging from CIF to HD.
WORLD’S FIRST H.264/MPEG-4 AVC HIGH-PROFILE/HIGH-DEFINITION ENCODING IP
AH264–IP: High-Profile/High-Definition Encoding IP
The high-profile design includes the most advanced H.264 coding tools. Using efficient compression tools like cabac entropy coding, dynamic transforms, enhanced intra prediction and scaling lists, Allegro’s H.264 encoding IP brings significant bit rates savings compared to existing solutions.
Allegro’s H.264 IP encoder design allows fast and easy integration in a wide range of System-On-Chip (SOC) applications. The H.264 IP core is an independent entity, requiring minimum support from the SOC embedded CPU. The motion estimation algorithms have been optimized to fit the memory bandwidth and latency requirements of consumer SOCs. Thanks to the product's hardware architecture, the H.264 coding IPs minimize both gate counts and power consumption.
H.264/MPEG-4 AVC Hardware Accelerator IPs
PH264-HA: Motion estimation and intra prediction IP
TH264-HA: Transform quantization and motion compensation IP
EH264-HA: Cabac and Cavlc entropy coding IP
DH264-HA: Deblocking filter IP
Hardware accelerator IPs are independent designs with direct access to external memory data structure.
Allegro’s H.264 encoding technology has already been used successfully in a 65nm System-On-Chip (SOC) by one of the world's top5 IC vendors.
Allegro’s H.264 encoding technology is perfectly suited for integration in applications like:
Mobile phonesCamcordersSet-top boxesWebcamsVideo surveillanceAll Allegro’s encoding IPs have been tested using Allegro’s “industry standard” certification streams.
Allegro’s H.264 encoding IPs are available for H.264 baseline, main and high profiles in resolutions ranging from CIF to HD.
WORLD’S FIRST H.264/MPEG-4 AVC HIGH-PROFILE/HIGH-DEFINITION ENCODING IP
AH264–IP: High-Profile/High-Definition Encoding IP
The high-profile design includes the most advanced H.264 coding tools. Using efficient compression tools like cabac entropy coding, dynamic transforms, enhanced intra prediction and scaling lists, Allegro’s H.264 encoding IP brings significant bit rates savings compared to existing solutions.
Allegro’s H.264 IP encoder design allows fast and easy integration in a wide range of System-On-Chip (SOC) applications. The H.264 IP core is an independent entity, requiring minimum support from the SOC embedded CPU. The motion estimation algorithms have been optimized to fit the memory bandwidth and latency requirements of consumer SOCs. Thanks to the product's hardware architecture, the H.264 coding IPs minimize both gate counts and power consumption.
| Type | Supported |
| Profile/level | Baseline, Main and High profiles up to level 4.1 |
| Input format | 4:2:0 or monochrome |
| Intra prediction | All intra4x4, intra8x8 and intra16x16 modes |
| Inter prediction | ¼ pel |
| Transform | 4x4 and 8x8 |
| Quantization | Flat, default and custom scaling list |
| Entropy coding | CABAC, CAVLC and PCM coding modes support |
| Loop filter | In-loop deblocking filter |
| Output bit rate | Up to 50 Mbit/s |
| Rate control | CBR, VBR |
H.264/MPEG-4 AVC Hardware Accelerator IPs
PH264-HA: Motion estimation and intra prediction IP
TH264-HA: Transform quantization and motion compensation IP
EH264-HA: Cabac and Cavlc entropy coding IP
DH264-HA: Deblocking filter IP
Hardware accelerator IPs are independent designs with direct access to external memory data structure.
 | IP |
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© ALLEGRO 2009
© ALLEGRO 2009