Junior ASIC Digital Design Engineer

Belfast, Northern Ireland or Grenoble, France

Company

ALLEGRO DVT is a company specialized in the domain of video compression.

Our HW and SW R&D engineers, based in Belfast, Marseille and near Grenoble develop high-quality digital video solutions and software for international customers in the field of encoding, decoding and compliance test streams.

Allegro DVT is comprised of a team of experts that design silicon intellectual property (IP) solutions for video encoding and decoding for all mainstream and emerging standards including VVC, AV1, AVS3, AVS2, HEVC and H.264; and is also the global leader in video compliance test streams.

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Job Overview

Allegro DVT is seeking graduate engineers studying Electronics, Software or a related discipline to join the team as Junior ASIC Digital Design Engineers. The position can be undertaken either in Belfast or in Grenoble.

The Junior ASIC Digital Design Engineer will be involved in various aspects of the design and verification of our Video IP cores. Part of a team of top-class industry video experts, you will assist the development of high performance Video compression and decompression IP cores in RTL supporting all video standards including HEVC / AV1 / VVC …).

Skills/Experience

  • Verilog (and/or VHDL) language proficiency, combined with a level of knowledge of CAD tools and
    ASIC design flows (modeling, design, simulation, synthesis, verification, etc.)
  • Knowledge of C/C ++, and scripting languages would be beneficial. A knowledge of the optimization of
    architectures and micro-architectures at HW / RTL level would also be beneficial
  • An understanding of video compression / decoding algorithms (for example: H.264 / H.265) is a plus

Soft Skills

  • Have a passion for technology, rigor, autonomy, and a capacity for innovation, teamwork, and customer orientation

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