D100 Series is the Allegro DVT’s ultimate multi-format, multi-stream real-time hardware decoder IP core, for all semiconductor manufacturers looking to integrate a high-performance video decoding solutions into their chips. Built upon a true multi- format architecture, the D100 Series Decoder IP core provides highly flexible solution up to HD/5Mpixels resolution and selectable video codecs. D100 Series supports H.264, HEVC, VP9, AV1 and JPEG formats.
The D100 Series Decoder IP core also generalizes the ultra-low latency decoding down to sub-frame latency and features 8-, 10-bit support and chroma sampling of 4:2:0, 4:4:4.
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