Allegro DVT Launches the World’s First Hardware-Based VVC/H.266 Decoder Silicon IP

July 1, 2021

Press Release D320

Allegro DVT, the leading provider of video processing silicon IPs, today announced theimmediate availability of its AL-D320 video decoder semiconductor IP coresupporting the latest Versatile Video Coding (VVC/H.266) format. The AL-D320 core is the world’s first hardware IP to support the new VVC format with 8, 10 and 12-bit samples, chroma sampling of 4:2:0 and 4:2:2 and image resolutions and rates of up to 8K120.Added to this,the core continues to support H.264 and HEVC up to 12-bit and 4:4:4 chroma subsampling. 

TheVersatile Video Coding(VVC/H.266)format has been developed as the successor to the High Efficiency Video Coding (HEVC/H.265) format,with the aim of 30-50% better video compression for the same perceptual video quality.VVC supportsresolutions up to16K as well as 360° videos.    

NouarHamze, CEO of Allegro DVTcommented“The increasedcomplexity of VVCrequires HW based implementations for the decoding function to achieve the best trade-off between power consumption, performance and total cost of the solution.”   

He added“The increase in complexity of leading-edge video codecs has lengthened development time.We have developed and released our VVC decoder IPearly on to accelerate market adoption.  Our release pre-empts the demandin a way that we believe will enableOEMs and semiconductor vendors toconfidently move forward with theintroductionofsolutionswith VVC decoding capabilityand therefore speed up the adoptionof this new codec to unlock new use cases such as8K broadcast worldwide.”   

The AL-D320 employs a unique multi-format and multi-core architecture which allows scalability to seamlessly support additional video codecs such as AV1/VP9/HEVC/H.264and higher decoding throughputs up to8K60 and8K120. 

The release of this range ofVVC decoder IP cores shows a continuation in Allegro DVT’s ability to consistently innovate and deliver at the highest level in the market.Building on existing production-proven video decoder semiconductor IP cores, theAL-D320 range of decoders provides end customers both early access to the latest technology while at the same time minimizing adoption risk.   

AL-D320 decoder IP is immediately available for integration by SoC vendors in various technology nodes ranging from 28nm down to 5nm and belowthrough aseamless and proven HW and SW integration kit. 

For more information

CONTACT US

Related News

Allegro DVT will be participating in the IP SOC China 2021

Allegro DVT will be participating in the IP SOC DAY China on September 15th 2021.
More information on the conference and registration details will be announced later. 
[...]

Read more

Allegro DVT Releases New Versions of its Encoder and Decoder IPs with Support for 12-bit sample size and 4:4:4 Chroma Format

Allegro DVT, the leading provider of video processing silicon IPs, today announced the release of new versions of its D3x0 and E2x0 decoder and encoder IPs with extended of sample sizes up to 12-bit and chroma sampling ranging from 4:2:0, 4:2:2 up to 4:4: [...]

Read more